Tiger Lake-U spotted in Intel GFX CI bootlog; more than just a 10 nm refinement?
Despite the Intel Tiger Lake series being over a year away from being released, we have already seen benchmarks appear detailing U-series and Y-series engineering samples. Now, @InstLatX64 has spotted a bootlog that sheds light on yet more information about Intel's next 10 nm U-series processors.
As expected, Tiger Lake-U (TL-U) will have four cores and will support Intel Hyper-Threading, meaning that it can execute up to eight threads simultaneously. Secondly, the bootlog records that the TL-U engineering sample has a 1.0 GHz base clock, which is lower than we saw in last month's UserBenchmark listing. Likewise, while the latter showed a TL-U sample reaching 3.6 GHz, the bootlog has TL-U peaking at 3.5 GHz, with most logs pegging it at between 3.3 and 3.4 GHz.
The bootlog details Intel's "cache redesign" for TL-U, as part of its Willow Cove microarchitecture, too. All examples in the bootlog spotted by @InstLatX64 report having 12 MB of L3 cache, or 3 MB per core. By contrast, Whiskey Lake and Ice Lake-U series processors like the Core i7-8565U and Core i7-1065G7 incorporate 2 MB of L3 cache per core. The bootlog also states that TL-U supports AVX-512, 512-bit CPU instructions typically found in Intel Xeon scalable processors.
In short, TL-U will not only refine on Intel's 10 nm FinFET process but also introduce a third more L3 cache and a new generation of Intel UHD Graphics among other advancements. However, AMD may be on Zen 4 by the time Intel releases TL-U in 2021, by which time it is expected to have switched to 5 nm or 6 nm processes. With AMD already ahead of Intel on the power of its integrated GPUs and the possibility of it having secured a significant contract with Microsoft, things may not look as good for Intel when Tiger Lake-U rolls around.
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