Even though the PCIe 4.0 specifications were finalized in 2017, the technology was introduced to consumers only this year with AMD’s B450 and X470 motherboard chipsets. Intel does not yet support the PCIe 4.0 standard, and it looks like the company might skip this version entirely, since the 5.0 standard is supposed to hit the market in late 2020. In order to further prove that the PCIe 4.0 standard is not going to stick around for too long, Rambus recently announced that it has finalized the development of its first PCIe 5.0 controller and it is ready to license it to chipset and SoC makers, so we might actually see commercial products integrating this technology earlier than previously scheduled.
The new PCIe 5.0 controller is built on a 7 nm FinFET node and is designed for performance-intensive applications linked to A.I., data centers, high-performance computing, storage and 400GbE networking. Its main features include:
- Integrated and co-validated PHY and digital controller for complete interface solution
- 32 GT/s bandwidth per lane with 128 GB/s bandwidth in x16 configuration
- Backward compatible to PCIe 4.0, 3.0 and 2.0
- PHY Supports Compute Express Link (CXL) interconnect
The digital controller was designed by Northwest Logic, a company that was recently acquired by Rambus. The company does not actually mention anything about license pricing, but it does specify that the PHY and digital controller may be licensed separately for use with third-party solutions..
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