RISC-V specifications update brings improved machine learning, virtualization and encryption instructions
RISC-V International, the organization behind the standardization of the RISC-V architecture, announced yesterday the ratification of 15 new specifications, of which the most important are Vector, Scalar Cryptography and Hypervisor. These new specifications are meant to accelerate the adoption of the RISC-V ISA and provide improved features for emerging industries such as AI / machine learning, IoT, connected / autonomous cars and aircraft, data centers and beyond.
The Vector specs represent a set of just over 100 instructions that can help accelerate ML inference for audio vision, voice processing and other related AI applications implemented with the onboard computers on autonomous vehicles.
With the introduction of the Scalar Cryptography specs, adding cryptographic hash and block cipher algorithms to applications is now an order of magnitude faster than using standard instructions. This should help app developers to cheaply implement advanced encryption functions by default, even in the smallest IoT devices.
Improved compatibility with popular OSes and increased malware protection is also provided through the Hypervisor specs. RISC-V processors can now efficiently host type-1 (bare-metal) and type-2 (hosted) hypervisors, effectively driving increased adoption for the RISC-V architecture in cloud and embedded applications where virtualization is critical, such as data centers, automotive applications, and industrial control applications.