Massive AMD Zen 5 IPC gain of 25%+ reported as leak alleges increased L1 cache and revamped L3 cache for Ryzen 8000 CPUs

Following his detailed leak about AMD’s Zen 5 CPUs early last month, RedGamingTech has now issued some updates to his previously alleged information. While most of the stuff remains largely the same, the leaker reveals a few new crucial details.

First up, Paul mentions that, according to multiple sources,  Zen 5 could have an IPC uplift of anywhere from 20 to more than 25%. The leaker personally thinks the single-thread IPC gain will potentially lie somewhere around the 20% mark. Furthermore, the leaker reiterates that Zen 5 clock speeds are similar to Zen 4 while maintaining with “high confidence” that Zen 5 CCDs will feature 8 cores.

Moving on, the leaker confidently claims the Ryzen 8000 processors will feature SMT-2 (Simultaneous Multithreading) and not SMT-4, wider decoders, an increase in load/store bandwidth, and new CPU instructions that could include FP16 and AVX512.

One of the biggest changes that AMD’s Zen 5 processors are rumored to feature is the revamped cache structure. Paul claims that the Zen 5 CPUs will pack a larger L1 cache but, unlike his past assertions of a larger L2 cache, the L2 cache is expected to remain the same as Zen 4 at 1 MB. Interestingly, Paul suggests that AMD could be internally testing SKUs with bigger L2 caches which is something that AdoredTV also recently alleged. The L3 cache could be a “Ladder” cache shared among the CPU cores.

Finally, although the leaker posits that AMD did consider upping the core count of the Ryzen 8000 processors, the desktop Zen 5 chips will top out at 16 cores/32 threads.

As always, leaks and rumors should never be taken as gospel, so we’ll have to wait and see what AMD Zen 5 brings to the table when it releases next year.

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