AMD Ryzen 3000's MCM design enables optimal utilization of the 7 nm process

When AMD's Lisa Su showed off the first Ryzen 3000 sample at CES 2019, she didn't go much in detail with respect to the features of the new chips. However, we do know that Ryzen 3000 will use a multi-chip module (MCM) approach to incorporate individual chiplets. Among these is the I/O controller that is fabbed on the more mature 14 nm process and the individual CPU cores that are made on the 7 nm node. This approach brings forth a couple of advantages to the table:

1. The I/O controller chiplet (which in all probability is being sourced from GloFo to honor the wafer supply agreement) is comprised of the PCI-Express Root Complex and the DDR4 memory controller. These components can continue to be made on current 14 nm nodes thereby enabling AMD to better utilize TSMC's 7 nm lines for the actual CPU chiplets.

2. AMD's move to 7 nm can potentially allow for more than 8 cores on a single die, possibly up to 12 or 16 cores. In the traditional approach, AMD would have to disable a lot many of perfectly working cores to cater to the entry and mid-range SKUs. These parts sell in good numbers, which means AMD would potentially be at a loss for having to disable working silicon. By making individual chiplets of 6 or 8 cores each, AMD can reduce the need to disable cores and also needs to deploy only the required number of chiplets as per the SKU. 

The only major negative here is that the memory controller now resides on a separate chiplet instead of being physically present in the CPU. We'll have to see how this affects memory performance in the real world but TechPowerUp has learnt that AMD will be introducing a new Infinity Fabric version that offers 2x the bandwidth (100 GBps) compared to the previous generation. The new Infinity Fabric on Package (IFOP) is implemented at three places in the MCM — one each between the I/O controller and individual 8-core CPU chiplets and the other between the CPU chiplets themselves. The higher bandwidth helps remove any bottlenecks while communicating with the two discrete 8-core CPU chiplets (or more in case of EPYC). 

While AMD is certainly the cynosure of all eyes at the moment for its Ryzen 3rd generation, Intel's Foveros 3D Stacking approach based on the 10 nm Sunny Cove architecture with integrated Gen11 graphics is an equally exciting tech that is slated to launch later this year. It will surely be fun to put these new processors through their paces to see potential gains across various workflows.