JEDEC releases LPDDR6 standard – data rates reach 14,400 MT/s

JEDEC has released JESD209-6, formalizing LPDDR6 five years after DDR5 entered the market. The new specification raises peak data rates to 10,667–14,400 MT/s, equivalent to roughly 28.5–38.4 GB/s of bandwidth, while targeting lower power budgets demanded by mobile devices and cutting-edge AI systems.

Performance gains come from a dual-sub-channel design: each die carries a 24-bit channel, and each channel is split into two 12-bit sub-channels. This configuration shortens access paths, trims latency, and maintains a 32-byte minimum granularity. On-the-fly burst-length control allows seamless switching between 32 and 64-byte transfers.

Power efficiency improves through reduced core voltages and Dynamic Voltage Frequency Scaling for Low Power, which drops supply levels during light workloads. Static and dynamic efficiency modes further limit active circuitry when there is low demand, and the architecture supports partial self-refresh to cut standby consumption.

Reliability advances include on-die ECC, programmable link protection, per-row activation counting, and carve-out meta regions for critical tasks. Optional command/address parity and built-in self-test features strengthen fault coverage, meeting the stricter requirements of automotive and data-center environments.

The industry response has been swift. Chipmakers, IP vendors, and test-equipment suppliers—including Cadence, Synopsys, MediaTek, Qualcomm, Samsung, Micron, and SK Hynix—have pledged support, signaling rapid adoption across smartphones, client PCs, edge servers, and in-vehicle systems.