Life in the fast lane: PCI Express 6.0 to offer 256 GBps speeds on x16, being targeted for a 2021 release

We have just started to see PCIe 4.0 boards for mainstream users thanks to the AMD X570 chipset and also saw PCI-SIG confirm the specifications for PCIe 5.0 for a 2020 launch. However, with the quest for more bandwidth being eternally insatiable, PCI-SIG is ready with specifications for PCIe 6.0 and is targeting it for a 2021 release.

PCIe 6.0 offers a large 256 GB/s bandwidth (128 GB/s full duplex) and a gigatranfer rate of 64 GT/s over 16 lanes. Other aspects of the PCIe 6.0 specification include PAM-4 signalling and low-latency forward error correction (FEC). Pulse Amplitude Modulation 4-Level (PAM-4) is an advancement over the Non-Return-to-Zero (NRZ) modulation technique used up till PCIe 5.0. In NRZ, two voltage levels represent logic 0 and logic 1. PAM-4 doubles the number of voltage levels to represent four combinations of two bits logic that include 11, 10, 01, and 00. 

What this essentially means is that PCIe 6 can transport more data in the same amount of time in the same channel. Think about using more and more PCIe devices with the same 20 to 24 PCIe lane count that we find in mainstream PCs. You can read more about PAM-4 signalling in this Intel white paper. 

PAM4 also uses low-latency FEC to improve data transfer reliability. FEC introduces a constant supply of error correction bits to ensure data integrity all through its transmission in the bus. While the benefits of this will not be immediately apparent to end-users, it is still good to have a robust error correction mechanism for mainstream computing.

PCIe 6.0 is backward-compatible with all previous PCIe generation so the slot itself won't be changing any time soon. Also, PCIe 6.0 retains the same signal loss value (36 dB) and channel reach as PCIe 5.0. This means vendors will be able to use the same trace lengths as PCIe 5.0 without having to redesign the traces.

From a seven-year wait from PCIe 1.0 to PCIe 4.0 to a two-year revision cadence, PCI-SIG is rising up to meet the demands of next generation data applications in IoT, AI, machine learning, etc. That being said, we don't expect consumer devices to lap up PCIe 6.0 just yet. Even PCIe 3.0 x16 is not fully saturated and with PCIe 4.0 just being available from this year, it will be quite some time before we even get to see PCIe 5.0 components.

Also, the increased cost of implementing PAM-4 signalling means that board manufactures will incur higher costs compared to NRZ. It ultimately boils down to demand and whether consumer PCs can actually make use of all that bandwidth.