Huawei announces 1.4 nm chipmaking technology to compete with TSMC

In the current year, SMIC, China’s leading semiconductor manufacturing foundry, is more than a few nodes behind TSMC, Samsung Foundry and Intel. That difference is here to stay for a while, but not for long. Huawei has announced it plans to compete with TSMC’s 1.4 nm node in 2031. It will still be a generation or so behind, but it should be enough to keep China’s tech ecosystem competitive with its Western counterparts.

Huawei plans to employ what it calls ‘logic folding’ tech to pull off the feat. Logic folding improves upon existing 3D stacking tech by stacking two chips on top of each other. As a result, one gets more transistor density in the same die area without the need for smaller patterning, which would involve the use of EUV tools, something that China doesn’t have, at least in the present. Huawei says the next-gen Kirin 2026 will be one of the first commercially available chips to employ logic folding.

However, China has supposedly built a somewhat functional EUV machine with the help of ex-ASML engineers. It isn’t functional now, but should be by 2031. This, combined with Huawei's existing efforts to breach the 2 nm barrier with tech like SAQP (self-aligned quadruple pattering), should allow Huawei and SMIC to breach the 5 nm barrier, resulting in even denser silicon.

Interestingly, Huawei hasn’t addressed the elephant in the room: cooling. Stacking multiple chips on top of each other will produce a lot more heat than conventional designs. Of course, it is far too early to speculate about the tech in general. Huawei has five years to iron out process inefficiencies, and at the rate at which it has progressed, it should be more than enough.