Zen 4 AMD EPYC Genoa to support AVX3-512 and BFLOAT16 in early blow against Intel Xeon Sapphire Rapids

We just reported about a considerable leak in regard to the AMD EPYC Genoa server CPU series and now more details about the Zen 4 processors have appeared, which if true will make things very difficult for the Sapphire Rapids Xeon chips that Intel should be introducing in 2022 (or even 2023). According to ChipHell (via tipster HXL), EPYC Genoa will support AVX3-512, BFLOAT16, and other instruction set architectures (ISAs). This is a big deal if it’s accurate, as the AVX-512 instruction set is normally associated with Intel chips (and to a lesser extent, Centaur).

On top of the additional ISA support, EPYC Genoa will also feature more than 64 cores per socket (with 96 cores being expected as the maximum SKU variant), with two threads per core and two sockets maximum configuration. Zen 4 will also support 57-bit virtual addresses and 52-bit physical addressing, and interestingly it will apparently come with performance and perf/watt improvements made possible by the “design and manufacturing”. Once again, AMD EPYC Genoa really seems to have had everything thrown at it, and this time that includes the kitchen sink.

Last but not least, a separate source has stated that the package size for EPYC Genoa is 72 mm x 75.4 mm, which means it is almost square and will have plenty of room for additional core-containing chiplets. The current package size for Zen 2 AMD EPYC processors (“Rome”) is 58.5 mm x 75.4 mm, hence their rectangular appearance. While Sapphire Rapids is based on a 10nm process and should support DDR5 and PCIe 5, facing a potential 96-core AMD rival with AVX3-512 and BFLOAT16 support will just make Intel’s uphill battle in the server arena even steeper, especially if the series keeps getting delayed.

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