China's open-source RISC-V processor project pledges 2025 delivery with ambitious performance targets

The Chinese Academy of Sciences (CAS) plans to roll out its XiangShan open-source processor in 2025, marking an important milestone in China’s drive for more domestic homegrown chips. Bao Yungang, deputy director at the Institute of Computing Technology, spilled the timeline in a recent Weibo update, highlighting how they’re progressing steadily on high-performance computing.

CAS kicked off the XiangShan initiative in 2019. It has made significant progress with its third-gen architecture, Kunminghu. Project leaders say this new architecture can deliver performance within about eight percent of Arm’s Neoverse N2 CPU core. That puts it in striking distance for powering cloud computing, HPC setups, and even ML tasks.

Throughout 2024, the development team zeroed in on optimizing Kunminghu’s area and power consumption. The processor boasts multiple parallel processing units for integer, floating-point, and vector operations, along with out-of-order execution features. Simulations have shown it can run at speeds of up to 3GHz.

The previous iteration, known as the Nanhu chip, was produced using a 14nm process node and clocked up to 2GHz. Introduced in late 2023, Nanhu served as the project’s second-generation silicon release.

XiangShan taps into the RISC-V instruction set under the Mulan PSL-2.0 license, giving folks royalty-free rights to use and tweak the design. That’s different from the usual licensing offered by giants like Arm, and it might change the future of processor design, similar to how Linux altered the market.

However, the XiangShan project is under growing scrutiny from the United States due to China’s increasing adoption of RISC-V. Lately, the U.S. Commerce Department has been reviewing potential security concerns. Google even removed RISC-V support from the Android kernel—something that could spell trouble for any future RISC-V-driven phones.