China finalizes work on proprietary "Loong Arch" CPU instruction set that does not conflict with foreign CPU patents

In its continued effort to reduce reliance on foreign technologies (particularly U.S.-made), China has been mostly focusing on getting up to speed with the hardware production facilities. The chip production nodes still lag behind TSMC’s capabilities, but China is making good progress as it already has working 7 nm nodes. To complement the hardware side, China has meanwhile managed to complete the development of its first self-developed processor instruction set that apparently does not conflict with foreign CPU patents.

Dubbed “Loong Arch,” China’s first domestic CPU instruction set was developed by Loongson Chuka Technology Co. Ltd. in less than a year and has recently received approval from a third-party IP evaluator. The white papers for “Loong Arch” were compared to tens of thousands of patents using code from the Alpha, ARM, MIPS, Power, RISC-V and x86 sets and the evaluation revealed that the design and address format are original and do not conflict with other patents. Loongson will soon be able to provide all Chinese partners with detailed “Loong Arch” white papers and IP integration guidance.

The new original set consists of around 2,000 instructions, including extensions for binary conversion, vector processing, advanced vector processing and virtualization. Even though it originally specialized in MIPS instruction sets, Loongson claims that the new instruction set is completely original and allows Chinese CPU makers to produce processors without the need to get special licenses from foreign companies.

Loongson also states that the new instruction set does away with pieces of code that are not used in modern software anymore in order to optimize low power consumption and easy software / virtual machine development. Furthermore, “Loong Arch” maintains compatibility with industry standards, ensuring highly efficient binary conversions.

The first Loong Arch-compliant processor "3A5000" has already been taped out and is being tested internally for extended compatibility. Initial tests revealed that fairly complicated programs written for other instruction architectures can operate normally on the 3A5000 chips via the advanced binary conversion functions.

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