AMD's Rome is rumored to be designed with 8 Zen 2 dies; Intel to respond with triple die Cooper Lake
Disclaimer: as always with rumors, do not immediately assume that they are true or false. Always evaluate them on their own merits and wait for AMD and Intel to confirm or deny these reports. Rumors are exciting to discuss, but exercise an appropriate amount of caution. It is possible to entertain an idea without accepting it as fact.
In August, YouTube tech channel AdoredTV revealed several documents about Nvidia's then unreleased architecture Turing; most of these claims ended up being true or close to the truth. The tech analyst now has yet another rumor, this time about AMD's and Intel's upcoming server architectures, Rome and Cooper Lake, respectively. AdoredTV claims to have reliable sources giving him information that Rome will be a 9 die design with 8 CPU dies and 1 IO die, for a total of 64 cores. Meanwhile, Intel's Cooper Lake will be a triple die design with two 28 core CPU dies and 1 IO die.
Although AdoredTV initially believed information that Rome would be a 5 die design, with 4 CPU dies and 1 IO die for a total of 48 or 64 cores (depending on whether or not AMD increased core counts on every die to 12 or 16 cores), he states that the 8 die design is more likely. His reasoning being that, the smaller the die, the greater the amount of yields, and when yields are higher on a wafer, it is more likely to find better cores than on a wafer used for a larger die. The analyst cited a research paper conducted on the viability of "chiplets," and idea of splitting up a large die into several smaller dies; the paper found that yields, average clock speed, and power efficiency was improved the closer the core count was to 1 core per die. AdoredTV speculates that the Zen 2 die will use the same layout as Zen 1 and +: two CCXs of 4 cores each.
Additionally, the analyst said Zen 2 would be a "grounds up" architecture similar to Zen 1 and would be doing away with the current memory control method known as NUMA. With 8 dies, Rome would be able to handle 4 TB of memory per socket, but without NUMA it is unknown how exactly this would work. If Rome is a quad socket server CPU, then on one motherboard for Epyc 2 we may see 16 TB of RAM. Rome is rumored to go into production in Q1 2019 and be available by Q3 2019.
AdoredTV went on to talk about Intel's Cooper Lake architecture, and claims the architecture will have 3 dies, 2 CPU dies and 1 IO die for a total of 56 cores. Without 10nm in an acceptable state for server CPU production, Intel has apparently opted to use multiple dies in order to increase core count. Cooper Lake will be fabbed on a 14nm process from Intel, either 14nm++ or an enhanced 14nm++ process (referred to as "14nm+++"), speculates AdoredTV. The tech analyst, however, has serious doubts about the Cooper Lake architecture and the process it is to be manufactured on, saying, "[Intel] will have to do everything they can do stave off Zen 2."
Right now, AMD's Naples based Epyc and Intel's Skylake SP based Xeon have a maximum core count of 32 and 28 cores respectively. If these rumors are true, then the maximum core count for both vendors will double in 2019. While AMD has already bet on the multi chip design, Intel has not yet thrown their hat in the ring (except perhaps with Kaby Lake G, which has one GPU and one CPU die as well as HBM2 on one package). The battle between Rome and Cooper Lake in the data center is looking to be very fierce.
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