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Alleged Tiger Lake Y chip makes more of a purr than a roar in Geekbench test

Intel's Tiger Lake processors are expected to be launched in 2020. (Image source: SegmentNext)
Intel's Tiger Lake processors are expected to be launched in 2020. (Image source: SegmentNext)
A Tiger Lake Y processor has seemingly been spotted on Geekbench delivering some very unimpressive results. However, it’s likely that if the record is genuine then Intel may be simply testing an early engineering sample (ES) that’s not operating at its regular base clock rate. Tiger Lake is expected to be the successor to Intel’s Ice Lake microarchitecture.

A record for a quad-core Tiger Lake Y processor on Geekbench has been unearthed by Tum Apisak. The scores the chip amasses in both the single-core test and multi-core test are low, but it does appear to be an early engineering sample as the stepping level is set at 0.

The single-core score stands at 146, while the Tiger Lake Y SKU managed 529 points in the multi-core test. Of course, Tiger Lake Y is expected to consist of extremely low-power mobile chips (9 W TDP), so performance akin to a 3rd Gen Threadripper is never going to be on the cards anyway.

The recorded base frequency in the Geekbench entry for the Tiger Lake Y chip is 1.19 GHz. Benchmark data for Tiger Lake Y processors has appeared before, and the results have been encouraging after taking into consideration the low power requirements and increased IPC rates compared to previous generations.

Tiger Lake is based on a 10 nm manufacturing process and is expected to bring features such as Willow Cove CPU cores, PCIe Gen 4 support, and Gen 12 Intel XE iGPUs.

Intel Corporation Tiger Lake Client Platform. (Image source: Geekbench)
Intel Corporation Tiger Lake Client Platform. (Image source: Geekbench)

Source(s)

Geekbench

Twitter (Tum Apisak)

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> Expert Reviews and News on Laptops, Smartphones and Tech Innovations > News > News Archive > Newsarchive 2019 11 > Alleged Tiger Lake Y chip makes more of a purr than a roar in Geekbench test
Daniel R Deakin, 2019-11-21 (Update: 2019-11-21)